The Supreme People's Court recently concluded an appeal case involving an administrative dispute over the cancellation of an integrated circuit layout design. On top of clarifying the assessment of originality of the disputed layout design, the Court further elaborated on the criteria for determining commonly recognized conventional designs in layout designs.
The case concerned an integrated circuit layout design titled "Lithium Battery Protection Chip with Integrated Controller and Switching Transistor for Single-Chip Negative Electrode Protection" (hereinafter referred to as the “Subject Layout Design”), owned by Company A.
Company B filed a petition to the CNIPA requesting the cancellation of the exclusive rights to the Subject Layout Design, arguing that it did not comply with Article 4 of the Regulations on the Protection of Layout-Designs of Integrated Circuits (hereinafter referred to as the "Layout Design Regulations"). CNIPA issued a decision (hereinafter referred to as the "Contested Decision") maintaining the validity of the exclusive rights to the Subject Layout Design. Dissatisfied, Company B filed a lawsuit with the First-Instance Court, contending that the Points of Originality 1–4 of the Subject Layout Design were entirely part of prior layout designs and thus lacked originality. Company B argued that the only difference between Evidence 6 and the Points of Originality 1–4 of the Subject Layout Design was the substitution of a power PMOS transistor with a power NMOS transistor. Since the manufacturing processes for NMOS and PMOS transistors were essentially identical, their layout designs were also substantially the same. The minor differences in details did not constitute the originality of the Subject Layout Design, and replacing a PMOS transistor with an NMOS transistor was a conventional technical means in the field. Therefore, the Subject Layout Design did not meet the requirements of Article 4 of the Layout Design Regulations, and Company B requested the revocation of the Contested Decision and an order for CNIPA to issue a new decision.
The First-Instance Court held that, in assessing originality, the portions in the Subject Layout Design corresponding to Points of Originality 1–4 should be considered as a whole. Even though PMOS and NMOS transistors were structurally symmetrical and functionally interchangeable, in the three-dimensional configurations and layout hierarchies in integrated circuit layout designs, it is not appropriate to consider the two as freely or simply interchangeable. Thus, the evidence on record was insufficient to prove that the layout design corresponding to Points of Originality 1–4 as a whole constituted a commonly recognized conventional design. Thus, the Subject Layout Design possessed originality. Accordingly, the First-Instance Court dismissed Company B's claims.
Dissatisfied with the first-instance judgment, Company B appealed to the Supreme People's Court.
In the second instance, the Supreme People's Court ruled that the rights holder’s observation on originality served as a reference for determining the originality of the layout design. While such an observation might describe or summarize the originality from different perspectives, it might not necessarily include descriptions of three-dimensional configurations. When evaluating the originality of the right holder's designated portions, the examiner should take the rights holder’s observation on originality into consideration and treat the specific three-dimensional configurations of components and interconnects within those portions as the assessment basis. The development of an integrated circuit layout design from abstract concepts to physical implementation can be divided to different levels, which typically includes logic design, circuit design, and layout design. The design concepts, principles, and methods at each level vary, leading to multiple possible choices for conventional designs at each level. Commonly recognized conventional designs in integrated circuit layout designs refer to designs that layout designers and integrated circuit manufacturers can obtain from textbooks, technical dictionaries, technical manuals, generic standards, or common modules in the field of layout design, as well as designs that are easily conceived based on fundamental design principles. Therefore, when determining whether a layout design qualifies as a commonly recognized conventional design in integrated circuit layout designs, the technical references and application objects used as basis should be limited to the more specific level of layout design, rather than the more abstract levels of logic design or circuit design. In layout designs, NMOS and PMOS transistors achieve different conductive channels based on the doping types of active regions, source contacts, and drain contacts, and are not merely symmetrical or replicative. Their implementation requires creating differently doped regions, leading to differences in manufacturing processes and layouts, with notable variations in area and impedance. Even if replacing NMOS for PMOS transistors in a circuit schematic is easy to think of, layout designers must consider not only the adaptation of the overall circuit and adjustments to connection relationships but also the selection of components. For instance, even the same type of transistors can have multiple layout expressions, let alone different types of transistors. In this case, Evidence 6 and the Subject Layout Design differed not only in the choice of MOS transistors but also in the number of corresponding layout layers and their connection relationships with other components. The NMOS transistor in the Subject Layout Design included an additional deep well layer compared to the PMOS transistor in Evidence 6, and the source, drain, and gate connections of the NMOS transistor and those of PMOS transistor were respectively different. These differentiated transistor layout designs reflected comprehensive considerations of various factors. Company B's existing evidence was insufficient to prove that replacing the PMOS transistor in Evidence 6 with the NMOS transistor in the Subject Layout Design constituted a commonly recognized conventional design in the field of integrated circuit layout designs. Accordingly, the Contested Decision and the first-instance judgment were upheld.
The second-instance judgment in this case clarified the determination of originality in integrated circuit layout designs and the criteria for assessing commonly recognized conventional designs. It provides reference value for further clarifying the adjudication approach in administrative disputes over the cancellation of integrated circuit layout designs, particularly in the determination of commonly recognized conventional designs.
(2024) Zui Gao Fa Zhi Xing Zhong No. 469
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